In conventional nonvolatile semiconductor memory devices, device elements are integrated in a two-dimensional plane on a silicon substrate. Increasing its memory capacity requires miniaturization of the dimensions of each single element. However, such miniaturization has recently been difficult in terms of cost and technology.
In this context, a collectively processed three-dimensional stacked memory has been proposed. This collectively processed three-dimensional stacked memory includes a stacked structure with insulating films and electrode films alternately stacked therein, silicon pillars piercing the stacked structure, and a charge storage layer (memory layer) provided between the silicon pillar and the electrode film. Thus, a memory cell is formed at the intersection between the silicon pillar and each electrode film. Furthermore, it is also proposed to use a U-shaped memory string connecting two silicon pillars on the substrate side. In such a collectively processed three-dimensional stacked memory, there is room for improvement to further increase the productivity.